Digital design methodologies including timing chain and counter based “hardwired” microprogram design, modules, and modular design. The course bridges LSI and MSI design treating microprocessors, and I/O interfacing. Bus protocol standards, interrupts, direct memory access, priority arbitration, asynchronous timing, and overlap or double buffering. Specific examples of design include controllers for disks, cassettes, video systems, and stepping motors. Course includes a laboratory with access to FPGAs and microprocessors.
Spring | Summer | Fall | ||
---|---|---|---|---|
(Session 1) | (Session 2) | |||
2025 | ||||
2024 | ||||
2023 | ||||
2022 | ||||
2021 | ||||
2020 | ||||
2019 | ||||
2018 | ||||
2017 | ||||
2016 | ||||
2015 | ||||
2014 | ||||
2013 | ||||
2012 | ||||
2011 | ||||
2010 | ||||
2009 | ||||
2008 | ||||
2007 | ||||
2006 | ||||
2005 | ||||
2004 | ||||
2003 | ||||
2002 | ||||
2001 | ||||
2000 | ||||
1999 | ||||
1998 |