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https://git.h3cjp.net/H3cJP/yuzu.git
synced 2024-11-14 18:32:47 +00:00
Fixes to Const Buffer Accessor and Formatting
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7af82ca022
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@ -14,21 +14,25 @@ namespace Tegra {
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u32 ConstBufferAccessor::access32(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
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u32 ConstBufferAccessor::access32(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
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u64 const_buffer, u64 offset) {
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u64 const_buffer, u64 offset) {
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auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
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auto& gpu = Core::System::GetInstance().GPU();
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auto& memory_manager = gpu.MemoryManager();
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auto& maxwell3d = gpu.Maxwell3D();
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const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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u32 result;
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u32 result;
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset * 4), sizeof(u32));
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset), sizeof(u32));
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return result;
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return result;
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}
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}
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u64 ConstBufferAccessor::access64(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
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u64 ConstBufferAccessor::access64(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
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u64 const_buffer, u64 offset) {
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u64 const_buffer, u64 offset) {
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auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
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auto& gpu = Core::System::GetInstance().GPU();
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auto& memory_manager = gpu.MemoryManager();
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auto& maxwell3d = gpu.Maxwell3D();
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const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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u64 result;
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u64 result;
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset * 4), sizeof(u64));
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset), sizeof(u64));
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return result;
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return result;
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}
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}
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@ -7,15 +7,12 @@ namespace Tegra {
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class ConstBufferAccessor {
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class ConstBufferAccessor {
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public:
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public:
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ConstBufferAccessor(Tegra::Engines::Maxwell3D& maxwell3d) : maxwell3d(maxwell3d) {}
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ConstBufferAccessor() {}
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~ConstBufferAccessor() = default;
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~ConstBufferAccessor() = default;
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u32 access32(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, u64 const_buffer, u64 offset);
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u32 access32(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, u64 const_buffer, u64 offset);
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u64 access64(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, u64 const_buffer, u64 offset);
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u64 access64(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, u64 const_buffer, u64 offset);
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private:
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Tegra::Engines::Maxwell3D& maxwell3d;
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};
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};
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} // namespace Tegra
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} // namespace Tegra
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@ -101,8 +101,7 @@ struct FramebufferCacheKey {
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RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window, Core::System& system,
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RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window, Core::System& system,
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ScreenInfo& info)
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ScreenInfo& info)
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: res_cache{*this}, shader_cache{*this, system}, global_cache{*this}, system{system},
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: res_cache{*this}, shader_cache{*this, system}, global_cache{*this}, system{system},
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screen_info{info}, buffer_cache(*this, STREAM_BUFFER_SIZE),
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screen_info{info}, buffer_cache(*this, STREAM_BUFFER_SIZE), const_buffer_accessor() {
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const_buffer_accessor(system.GPU().Maxwell3D()) {
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// Create sampler objects
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// Create sampler objects
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for (std::size_t i = 0; i < texture_samplers.size(); ++i) {
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for (std::size_t i = 0; i < texture_samplers.size(); ++i) {
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texture_samplers[i].Create();
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texture_samplers[i].Create();
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