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Merge pull request #12066 from ameerj/nvidia-nsanity
shader_recompiler: add byteswap pattern workaround for Nvidia
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commit
4458920799
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@ -231,6 +231,7 @@ add_library(shader_recompiler STATIC
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ir_opt/rescaling_pass.cpp
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ir_opt/ssa_rewrite_pass.cpp
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ir_opt/texture_pass.cpp
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ir_opt/vendor_workaround_pass.cpp
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ir_opt/verification_pass.cpp
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object_pool.h
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precompiled_headers.h
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@ -310,6 +310,7 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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}
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Optimization::CollectShaderInfoPass(env, program);
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Optimization::LayerPass(program, host_info);
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Optimization::VendorWorkaroundPass(program);
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CollectInterpolationInfo(env, program);
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AddNVNStorageBuffers(program);
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@ -26,6 +26,7 @@ void SsaRewritePass(IR::Program& program);
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void PositionPass(Environment& env, IR::Program& program);
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void TexturePass(Environment& env, IR::Program& program, const HostTranslateInfo& host_info);
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void LayerPass(IR::Program& program, const HostTranslateInfo& host_info);
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void VendorWorkaroundPass(IR::Program& program);
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void VerificationPass(const IR::Program& program);
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// Dual Vertex
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79
src/shader_recompiler/ir_opt/vendor_workaround_pass.cpp
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79
src/shader_recompiler/ir_opt/vendor_workaround_pass.cpp
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@ -0,0 +1,79 @@
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// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Optimization {
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namespace {
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void AddingByteSwapsWorkaround(IR::Block& block, IR::Inst& inst) {
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/*
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* Workaround for an NVIDIA bug seen in Super Mario RPG
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*
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* We are looking for this pattern:
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* %lhs_bfe = BitFieldUExtract %factor_a, #0, #16
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* %lhs_mul = IMul32 %lhs_bfe, %factor_b // potentially optional?
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* %lhs_shl = ShiftLeftLogical32 %lhs_mul, #16
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* %rhs_bfe = BitFieldUExtract %factor_a, #16, #16
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* %result = IAdd32 %lhs_shl, %rhs_bfe
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*
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* And replacing the IAdd32 with a BitwiseOr32
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* %result = BitwiseOr32 %lhs_shl, %rhs_bfe
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*
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*/
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IR::Inst* const lhs_shl{inst.Arg(0).TryInstRecursive()};
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IR::Inst* const rhs_bfe{inst.Arg(1).TryInstRecursive()};
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if (!lhs_shl || !rhs_bfe) {
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return;
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}
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if (lhs_shl->GetOpcode() != IR::Opcode::ShiftLeftLogical32 ||
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lhs_shl->Arg(1) != IR::Value{16U}) {
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return;
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}
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if (rhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract || rhs_bfe->Arg(1) != IR::Value{16U} ||
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rhs_bfe->Arg(2) != IR::Value{16U}) {
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return;
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}
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IR::Inst* const lhs_mul{lhs_shl->Arg(0).TryInstRecursive()};
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if (!lhs_mul) {
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return;
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}
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const bool lhs_mul_optional{lhs_mul->GetOpcode() == IR::Opcode::BitFieldUExtract};
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if (lhs_mul->GetOpcode() != IR::Opcode::IMul32 &&
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lhs_mul->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return;
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}
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IR::Inst* const lhs_bfe{lhs_mul_optional ? lhs_mul : lhs_mul->Arg(0).TryInstRecursive()};
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if (!lhs_bfe) {
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return;
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}
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if (lhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return;
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}
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if (lhs_bfe->Arg(1) != IR::Value{0U} || lhs_bfe->Arg(2) != IR::Value{16U}) {
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return;
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}
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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inst.ReplaceUsesWith(ir.BitwiseOr(IR::U32{inst.Arg(0)}, IR::U32{inst.Arg(1)}));
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}
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} // Anonymous namespace
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void VendorWorkaroundPass(IR::Program& program) {
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for (IR::Block* const block : program.post_order_blocks) {
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for (IR::Inst& inst : block->Instructions()) {
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switch (inst.GetOpcode()) {
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case IR::Opcode::IAdd32:
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AddingByteSwapsWorkaround(*block, inst);
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break;
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default:
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break;
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}
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}
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}
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}
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} // namespace Shader::Optimization
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