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Merge pull request #1113 from Subv/texs_mask
Shaders/TEXS: Fixed the component mask in the TEXS instruction.
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commit
0a1d4fbc5c
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@ -12,6 +12,7 @@
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#include <boost/optional.hpp>
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#include <boost/optional.hpp>
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "common/common_types.h"
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@ -446,16 +447,20 @@ union Instruction {
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}
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}
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bool IsComponentEnabled(size_t component) const {
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bool IsComponentEnabled(size_t component) const {
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static constexpr std::array<std::array<u32, 8>, 4> mask_lut{
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static constexpr std::array<std::array<u32, 8>, 4> mask_lut{{
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{{},
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{},
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{0x1, 0x2, 0x4, 0x8, 0x3},
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{0x1, 0x2, 0x4, 0x8, 0x3, 0x9, 0xa, 0xc},
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{0x1, 0x2, 0x4, 0x8, 0x3, 0x9, 0xa, 0xc},
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{0x7, 0xb, 0xd, 0xe, 0xf}}};
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{0x1, 0x2, 0x4, 0x8, 0x3, 0x9, 0xa, 0xc},
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{0x7, 0xb, 0xd, 0xe, 0xf},
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}};
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size_t index{gpr0.Value() != Register::ZeroIndex ? 1U : 0U};
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size_t index{gpr0.Value() != Register::ZeroIndex ? 1U : 0U};
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index |= gpr28.Value() != Register::ZeroIndex ? 2 : 0;
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index |= gpr28.Value() != Register::ZeroIndex ? 2 : 0;
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return ((1ull << component) & mask_lut[index][component_mask_selector]) != 0;
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u32 mask = mask_lut[index][component_mask_selector];
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// A mask of 0 means this instruction uses an unimplemented mask.
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ASSERT(mask != 0);
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return ((1ull << component) & mask) != 0;
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}
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}
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} texs;
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} texs;
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