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Merge pull request #2778 from ReinUsesLisp/nop

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shader_ir: Implement NOP
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bunnei 2019-08-18 08:51:34 -04:00 committed by GitHub
parent 87bbefe55f 2ff8044806
commit ca61e298b3
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2 changed files with 13 additions and 0 deletions
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7
src/video_core/engines/shader_bytecode.h
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@ -559,6 +559,11 @@ union Instruction {
BitField<39, 8, Register> gpr39;
BitField<48, 16, u64> opcode;
union {
BitField<8, 5, ConditionCode> cc;
BitField<13, 1, u64> trigger;
} nop;
union {
BitField<8, 8, Register> gpr;
BitField<20, 24, s64> offset;
@ -1516,6 +1521,7 @@ public:
TMML, // Texture Mip Map Level
SUST, // Surface Store
EXIT,
NOP,
IPA,
OUT_R, // Emit vertex/primitive
ISBERD,
@ -1795,6 +1801,7 @@ private:
INST("110111110110----", Id::TMML_B, Type::Texture, "TMML_B"),
INST("1101111101011---", Id::TMML, Type::Texture, "TMML"),
INST("11101011001-----", Id::SUST, Type::Image, "SUST"),
INST("0101000010110---", Id::NOP, Type::Trivial, "NOP"),
INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),

6
src/video_core/shader/decode/other.cpp
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@ -22,6 +22,12 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
const auto opcode = OpCode::Decode(instr);
switch (opcode->get().GetId()) {
case OpCode::Id::NOP: {
UNIMPLEMENTED_IF(instr.nop.cc != Tegra::Shader::ConditionCode::T);
UNIMPLEMENTED_IF(instr.nop.trigger != 0);
// With the previous preconditions, this instruction is a no-operation.
break;
}
case OpCode::Id::EXIT: {
const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "EXIT condition code used: {}",