mirror of
https://git.h3cjp.net/H3cJP/citra.git
synced 2024-12-03 17:32:46 +00:00
vulkan: Defer descriptor set work to the Vulkan thread
Move descriptor lookup and update code to a separate thread. Delaying this removes work from the main GPU thread and allows creating descriptor layouts on another thread. This reduces a bit the workload of the main thread when new pipelines are encountered.
This commit is contained in:
parent
2f3c3dfc10
commit
ac8835659e
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@ -172,11 +172,12 @@ struct AstcPushConstants {
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};
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} // Anonymous namespace
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ComputePass::ComputePass(const Device& device, DescriptorPool& descriptor_pool,
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ComputePass::ComputePass(const Device& device_, DescriptorPool& descriptor_pool,
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vk::Span<VkDescriptorSetLayoutBinding> bindings,
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vk::Span<VkDescriptorUpdateTemplateEntryKHR> templates,
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const DescriptorBankInfo& bank_info,
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vk::Span<VkPushConstantRange> push_constants, std::span<const u32> code) {
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vk::Span<VkPushConstantRange> push_constants, std::span<const u32> code)
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: device{device_} {
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descriptor_set_layout = device.GetLogical().CreateDescriptorSetLayout({
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.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
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.pNext = nullptr,
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@ -237,15 +238,6 @@ ComputePass::ComputePass(const Device& device, DescriptorPool& descriptor_pool,
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ComputePass::~ComputePass() = default;
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VkDescriptorSet ComputePass::CommitDescriptorSet(VKUpdateDescriptorQueue& update_descriptor_queue) {
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if (!descriptor_template) {
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return nullptr;
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}
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const VkDescriptorSet set = descriptor_allocator.Commit();
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update_descriptor_queue.Send(descriptor_template.address(), set);
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return set;
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}
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Uint8Pass::Uint8Pass(const Device& device, VKScheduler& scheduler_, DescriptorPool& descriptor_pool,
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StagingBufferPool& staging_buffer_pool_,
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VKUpdateDescriptorQueue& update_descriptor_queue_)
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@ -265,10 +257,11 @@ std::pair<VkBuffer, VkDeviceSize> Uint8Pass::Assemble(u32 num_vertices, VkBuffer
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(src_buffer, src_offset, num_vertices);
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update_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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const VkBuffer buffer{staging.buffer};
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scheduler.RequestOutsideRenderPassOperationContext();
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scheduler.Record([this, buffer = staging.buffer, set, num_vertices](vk::CommandBuffer cmdbuf) {
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scheduler.Record([this, buffer, descriptor_data, num_vertices](vk::CommandBuffer cmdbuf) {
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static constexpr u32 DISPATCH_SIZE = 1024;
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static constexpr VkMemoryBarrier WRITE_BARRIER{
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.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
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@ -276,6 +269,8 @@ std::pair<VkBuffer, VkDeviceSize> Uint8Pass::Assemble(u32 num_vertices, VkBuffer
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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};
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const VkDescriptorSet set = descriptor_allocator.Commit();
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device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
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cmdbuf.Dispatch(Common::DivCeil(num_vertices, DISPATCH_SIZE), 1, 1);
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@ -321,10 +316,10 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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update_descriptor_queue.Acquire();
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update_descriptor_queue.AddBuffer(src_buffer, src_offset, input_size);
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update_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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scheduler.RequestOutsideRenderPassOperationContext();
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scheduler.Record([this, buffer = staging.buffer, set, num_tri_vertices, base_vertex,
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scheduler.Record([this, buffer = staging.buffer, descriptor_data, num_tri_vertices, base_vertex,
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index_shift](vk::CommandBuffer cmdbuf) {
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static constexpr u32 DISPATCH_SIZE = 1024;
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static constexpr VkMemoryBarrier WRITE_BARRIER{
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@ -333,7 +328,9 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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};
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const std::array push_constants = {base_vertex, index_shift};
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const std::array push_constants{base_vertex, index_shift};
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const VkDescriptorSet set = descriptor_allocator.Commit();
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device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
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cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(push_constants),
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@ -353,7 +350,7 @@ ASTCDecoderPass::ASTCDecoderPass(const Device& device_, VKScheduler& scheduler_,
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: ComputePass(device_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
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ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(AstcPushConstants)>, ASTC_DECODER_COMP_SPV),
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device{device_}, scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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update_descriptor_queue{update_descriptor_queue_}, memory_allocator{memory_allocator_} {}
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ASTCDecoderPass::~ASTCDecoderPass() = default;
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@ -451,16 +448,14 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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update_descriptor_queue.AddBuffer(*data_buffer, sizeof(ASTC_ENCODINGS_VALUES),
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sizeof(SWIZZLE_TABLE));
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update_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const VkPipelineLayout vk_layout = *layout;
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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// To unswizzle the ASTC data
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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ASSERT(params.origin == (std::array<u32, 3>{0, 0, 0}));
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ASSERT(params.destination == (std::array<s32, 3>{0, 0, 0}));
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scheduler.Record([vk_layout, num_dispatches_x, num_dispatches_y, num_dispatches_z,
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block_dims, params, set](vk::CommandBuffer cmdbuf) {
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scheduler.Record([this, num_dispatches_x, num_dispatches_y, num_dispatches_z, block_dims,
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params, descriptor_data](vk::CommandBuffer cmdbuf) {
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const AstcPushConstants uniforms{
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.blocks_dims = block_dims,
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.bytes_per_block_log2 = params.bytes_per_block_log2,
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@ -470,8 +465,10 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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.block_height = params.block_height,
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.block_height_mask = params.block_height_mask,
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};
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, vk_layout, 0, set, {});
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cmdbuf.PushConstants(vk_layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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const VkDescriptorSet set = descriptor_allocator.Commit();
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device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
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cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
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});
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}
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@ -36,15 +36,14 @@ public:
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~ComputePass();
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protected:
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VkDescriptorSet CommitDescriptorSet(VKUpdateDescriptorQueue& update_descriptor_queue);
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const Device& device;
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vk::DescriptorUpdateTemplateKHR descriptor_template;
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vk::PipelineLayout layout;
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vk::Pipeline pipeline;
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private:
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vk::DescriptorSetLayout descriptor_set_layout;
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DescriptorAllocator descriptor_allocator;
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private:
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vk::ShaderModule module;
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};
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@ -99,7 +98,6 @@ public:
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private:
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void MakeDataBuffer();
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const Device& device;
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VKScheduler& scheduler;
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StagingBufferPool& staging_buffer_pool;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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@ -18,21 +18,22 @@
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namespace Vulkan {
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ComputePipeline::ComputePipeline(const Device& device, DescriptorPool& descriptor_pool,
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ComputePipeline::ComputePipeline(const Device& device_, DescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue_,
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Common::ThreadWorker* thread_worker, const Shader::Info& info_,
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vk::ShaderModule spv_module_)
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: update_descriptor_queue{update_descriptor_queue_}, info{info_},
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: device{device_}, update_descriptor_queue{update_descriptor_queue_}, info{info_},
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spv_module(std::move(spv_module_)) {
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DescriptorLayoutBuilder builder{device.GetLogical()};
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builder.Add(info, VK_SHADER_STAGE_COMPUTE_BIT);
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auto func{[this, &descriptor_pool] {
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DescriptorLayoutBuilder builder{device.GetLogical()};
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builder.Add(info, VK_SHADER_STAGE_COMPUTE_BIT);
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descriptor_set_layout = builder.CreateDescriptorSetLayout();
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pipeline_layout = builder.CreatePipelineLayout(*descriptor_set_layout);
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descriptor_update_template = builder.CreateTemplate(*descriptor_set_layout, *pipeline_layout);
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, info);
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descriptor_set_layout = builder.CreateDescriptorSetLayout();
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pipeline_layout = builder.CreatePipelineLayout(*descriptor_set_layout);
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descriptor_update_template =
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builder.CreateTemplate(*descriptor_set_layout, *pipeline_layout);
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, info);
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auto func{[this, &device] {
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const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO_EXT,
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.pNext = nullptr,
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@ -166,15 +167,16 @@ void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute,
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build_condvar.wait(lock, [this] { return is_built.load(std::memory_order::relaxed); });
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});
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}
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scheduler.Record([this](vk::CommandBuffer cmdbuf) {
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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scheduler.Record([this, descriptor_data](vk::CommandBuffer cmdbuf) {
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
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});
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if (!descriptor_set_layout) {
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return;
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}
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const VkDescriptorSet descriptor_set{descriptor_allocator.Commit()};
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update_descriptor_queue.Send(descriptor_update_template.address(), descriptor_set);
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scheduler.Record([this, descriptor_set](vk::CommandBuffer cmdbuf) {
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if (!descriptor_set_layout) {
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return;
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}
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const VkDescriptorSet descriptor_set{descriptor_allocator.Commit()};
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const vk::Device& dev{device.GetLogical()};
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dev.UpdateDescriptorSet(descriptor_set, *descriptor_update_template, descriptor_data);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline_layout, 0,
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descriptor_set, nullptr);
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});
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@ -40,6 +40,7 @@ public:
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VKScheduler& scheduler, BufferCache& buffer_cache, TextureCache& texture_cache);
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private:
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const Device& device;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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Shader::Info info;
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@ -205,31 +205,31 @@ ConfigureFuncPtr ConfigureFunc(const std::array<vk::ShaderModule, NUM_STAGES>& m
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GraphicsPipeline::GraphicsPipeline(Tegra::Engines::Maxwell3D& maxwell3d_,
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Tegra::MemoryManager& gpu_memory_, VKScheduler& scheduler_,
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BufferCache& buffer_cache_, TextureCache& texture_cache_,
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const Device& device, DescriptorPool& descriptor_pool,
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const Device& device_, DescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue_,
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Common::ThreadWorker* worker_thread,
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RenderPassCache& render_pass_cache,
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const GraphicsPipelineCacheKey& key_,
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std::array<vk::ShaderModule, NUM_STAGES> stages,
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const std::array<const Shader::Info*, NUM_STAGES>& infos)
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: key{key_}, maxwell3d{maxwell3d_}, gpu_memory{gpu_memory_}, texture_cache{texture_cache_},
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buffer_cache{buffer_cache_}, scheduler{scheduler_},
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: key{key_}, maxwell3d{maxwell3d_}, gpu_memory{gpu_memory_}, device{device_},
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texture_cache{texture_cache_}, buffer_cache{buffer_cache_}, scheduler{scheduler_},
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update_descriptor_queue{update_descriptor_queue_}, spv_modules{std::move(stages)} {
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std::ranges::transform(infos, stage_infos.begin(),
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[](const Shader::Info* info) { return info ? *info : Shader::Info{}; });
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DescriptorLayoutBuilder builder{MakeBuilder(device, stage_infos)};
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descriptor_set_layout = builder.CreateDescriptorSetLayout();
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, stage_infos);
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auto func{[this, &render_pass_cache, &descriptor_pool] {
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DescriptorLayoutBuilder builder{MakeBuilder(device, stage_infos)};
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descriptor_set_layout = builder.CreateDescriptorSetLayout();
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, stage_infos);
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auto func{[this, &device, &render_pass_cache, builder] {
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const VkDescriptorSetLayout set_layout{*descriptor_set_layout};
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pipeline_layout = builder.CreatePipelineLayout(set_layout);
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descriptor_update_template = builder.CreateTemplate(set_layout, *pipeline_layout);
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const VkRenderPass render_pass{render_pass_cache.Get(MakeRenderPassKey(key.state))};
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Validate();
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MakePipeline(device, render_pass);
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MakePipeline(render_pass);
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std::lock_guard lock{build_mutex};
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is_built = true;
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@ -440,24 +440,22 @@ void GraphicsPipeline::ConfigureDraw() {
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build_condvar.wait(lock, [this] { return is_built.load(std::memory_order::relaxed); });
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});
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}
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if (scheduler.UpdateGraphicsPipeline(this)) {
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scheduler.Record([this](vk::CommandBuffer cmdbuf) {
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
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});
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}
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if (!descriptor_set_layout) {
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return;
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}
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const VkDescriptorSet descriptor_set{descriptor_allocator.Commit()};
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update_descriptor_queue.Send(descriptor_update_template.address(), descriptor_set);
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scheduler.Record([this, descriptor_set](vk::CommandBuffer cmdbuf) {
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const bool bind_pipeline{scheduler.UpdateGraphicsPipeline(this)};
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const void* const descriptor_data{update_descriptor_queue.UpdateData()};
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scheduler.Record([this, descriptor_data, bind_pipeline](vk::CommandBuffer cmdbuf) {
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
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if (!descriptor_set_layout) {
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return;
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}
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const VkDescriptorSet descriptor_set{descriptor_allocator.Commit()};
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const vk::Device& dev{device.GetLogical()};
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dev.UpdateDescriptorSet(descriptor_set, *descriptor_update_template, descriptor_data);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline_layout, 0,
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descriptor_set, nullptr);
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});
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}
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void GraphicsPipeline::MakePipeline(const Device& device, VkRenderPass render_pass) {
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void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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FixedPipelineState::DynamicState dynamic{};
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if (!device.IsExtExtendedDynamicStateSupported()) {
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dynamic = key.state.dynamic_state;
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@ -109,19 +109,20 @@ private:
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void ConfigureDraw();
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void MakePipeline(const Device& device, VkRenderPass render_pass);
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void MakePipeline(VkRenderPass render_pass);
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void Validate();
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const GraphicsPipelineCacheKey key;
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Tegra::Engines::Maxwell3D& maxwell3d;
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Tegra::MemoryManager& gpu_memory;
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const Device& device;
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TextureCache& texture_cache;
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BufferCache& buffer_cache;
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VKScheduler& scheduler;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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void (*configure_func)(GraphicsPipeline*, bool);
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void (*configure_func)(GraphicsPipeline*, bool){};
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std::vector<GraphicsPipelineCacheKey> transition_keys;
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std::vector<GraphicsPipeline*> transitions;
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@ -36,13 +36,4 @@ void VKUpdateDescriptorQueue::Acquire() {
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upload_start = payload_cursor;
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}
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void VKUpdateDescriptorQueue::Send(const VkDescriptorUpdateTemplateKHR* update_template,
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VkDescriptorSet set) {
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const void* const data = upload_start;
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const vk::Device* const logical = &device.GetLogical();
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scheduler.Record([data, logical, set, update_template](vk::CommandBuffer) {
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logical->UpdateDescriptorSet(set, *update_template, data);
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});
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}
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} // namespace Vulkan
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@ -39,7 +39,9 @@ public:
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void Acquire();
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void Send(const VkDescriptorUpdateTemplateKHR* update_template, VkDescriptorSet set);
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const DescriptorUpdateEntry* UpdateData() const noexcept {
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return upload_start;
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}
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void AddSampledImage(VkImageView image_view, VkSampler sampler) {
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*(payload_cursor++) = VkDescriptorImageInfo{
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