mirror of
https://git.h3cjp.net/H3cJP/citra.git
synced 2024-12-11 13:24:56 +00:00
arm: fixed bug in how thread context switch occurs with SkyEye
This commit is contained in:
parent
870c6146e7
commit
9ece9da50d
|
@ -118,6 +118,9 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
|
|||
|
||||
ctx.fpscr = state->VFP[1];
|
||||
ctx.fpexc = state->VFP[2];
|
||||
|
||||
ctx.reg_15 = state->Reg[15];
|
||||
ctx.mode = state->NextInstr;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -137,8 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
|
|||
state->VFP[1] = ctx.fpscr;
|
||||
state->VFP[2] = ctx.fpexc;
|
||||
|
||||
state->Reg[15] = ctx.pc;
|
||||
state->NextInstr = RESUME;
|
||||
state->Reg[15] = ctx.reg_15;
|
||||
state->NextInstr = ctx.mode;
|
||||
}
|
||||
|
||||
/// Prepare core for thread reschedule (if needed to correctly handle state)
|
||||
|
|
|
@ -29,6 +29,10 @@ struct ThreadContext {
|
|||
u32 fpu_registers[32];
|
||||
u32 fpscr;
|
||||
u32 fpexc;
|
||||
|
||||
// These are not part of native ThreadContext, but needed by emu
|
||||
u32 reg_15;
|
||||
u32 mode;
|
||||
};
|
||||
|
||||
enum ResetType {
|
||||
|
|
Loading…
Reference in a new issue