lux/citra
1
0
Fork 0
mirror of https://git.h3cjp.net/H3cJP/citra.git synced 2024-11-29 23:42:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #1814 from JayFoxRox/fix-read-after-write

Browse source 
Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSD
This commit is contained in:
Mat M 2016-05-18 08:32:36 -04:00
parent 960297e577 3a45eacb16
commit 7a7488a0bb
1 changed files with 8 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View file

@ -5527,28 +5527,32 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
// SMUAD and SMLAD
if (BIT(op2, 1) == 0) {
RD = (product1 + product2);
u32 rd_val = (product1 + product2);
if (inst_cream->Ra != 15) {
RD += cpu->Reg[inst_cream->Ra];
rd_val += cpu->Reg[inst_cream->Ra];
if (ARMul_AddOverflowQ(product1 + product2, cpu->Reg[inst_cream->Ra]))
cpu->Cpsr |= (1 << 27);
}
RD = rd_val;
if (ARMul_AddOverflowQ(product1, product2))
cpu->Cpsr |= (1 << 27);
}
// SMUSD and SMLSD
else {
RD = (product1 - product2);
u32 rd_val = (product1 - product2);
if (inst_cream->Ra != 15) {
RD += cpu->Reg[inst_cream->Ra];
rd_val += cpu->Reg[inst_cream->Ra];
if (ARMul_AddOverflowQ(product1 - product2, cpu->Reg[inst_cream->Ra]))
cpu->Cpsr |= (1 << 27);
}
RD = rd_val;
}
}