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shader: Implement SR_LaneId
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595806fb1c
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45d547af11
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@ -71,6 +71,7 @@ void EmitSetMXFlag(EmitContext& ctx);
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Id EmitWorkgroupId(EmitContext& ctx);
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Id EmitWorkgroupId(EmitContext& ctx);
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Id EmitLocalInvocationId(EmitContext& ctx);
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Id EmitLocalInvocationId(EmitContext& ctx);
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Id EmitLoadLocal(EmitContext& ctx, Id word_offset);
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Id EmitLoadLocal(EmitContext& ctx, Id word_offset);
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Id EmitLaneId(EmitContext& ctx);
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void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value);
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void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value);
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Id EmitUndefU1(EmitContext& ctx);
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Id EmitUndefU1(EmitContext& ctx);
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Id EmitUndefU8(EmitContext& ctx);
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Id EmitUndefU8(EmitContext& ctx);
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@ -303,6 +303,10 @@ Id EmitLocalInvocationId(EmitContext& ctx) {
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return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id);
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return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id);
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}
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}
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Id EmitLaneId(EmitContext& ctx) {
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return ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id);
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}
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Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
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Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
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const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
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const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
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return ctx.OpLoad(ctx.U32[1], pointer);
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return ctx.OpLoad(ctx.U32[1], pointer);
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@ -355,6 +355,10 @@ U32 IREmitter::LocalInvocationIdZ() {
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return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)};
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return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)};
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}
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}
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U32 IREmitter::LaneId() {
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return Inst<U32>(Opcode::LaneId);
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}
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U32 IREmitter::LoadGlobalU8(const U64& address) {
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U32 IREmitter::LoadGlobalU8(const U64& address) {
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return Inst<U32>(Opcode::LoadGlobalU8, address);
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return Inst<U32>(Opcode::LoadGlobalU8, address);
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}
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}
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@ -97,6 +97,8 @@ public:
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[[nodiscard]] U32 LocalInvocationIdY();
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[[nodiscard]] U32 LocalInvocationIdY();
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[[nodiscard]] U32 LocalInvocationIdZ();
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[[nodiscard]] U32 LocalInvocationIdZ();
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[[nodiscard]] U32 LaneId();
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[[nodiscard]] U32 LoadGlobalU8(const U64& address);
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[[nodiscard]] U32 LoadGlobalU8(const U64& address);
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[[nodiscard]] U32 LoadGlobalS8(const U64& address);
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[[nodiscard]] U32 LoadGlobalS8(const U64& address);
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[[nodiscard]] U32 LoadGlobalU16(const U64& address);
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[[nodiscard]] U32 LoadGlobalU16(const U64& address);
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@ -63,6 +63,7 @@ OPCODE(SetTRFlag, Void, U1,
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OPCODE(SetMXFlag, Void, U1, )
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OPCODE(SetMXFlag, Void, U1, )
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OPCODE(WorkgroupId, U32x3, )
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OPCODE(WorkgroupId, U32x3, )
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OPCODE(LocalInvocationId, U32x3, )
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OPCODE(LocalInvocationId, U32x3, )
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OPCODE(LaneId, U32, )
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// Undefined
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// Undefined
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OPCODE(UndefU1, U1, )
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OPCODE(UndefU1, U1, )
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@ -99,6 +99,8 @@ enum class SpecialRegister : u64 {
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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case SpecialRegister::SR_WSCALEFACTOR_Z:
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case SpecialRegister::SR_WSCALEFACTOR_Z:
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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case SpecialRegister::SR_LANEID:
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return ir.LaneId();
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default:
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default:
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throw NotImplementedException("S2R special register {}", special_register);
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throw NotImplementedException("S2R special register {}", special_register);
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}
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}
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@ -340,6 +340,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
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case IR::Opcode::ShuffleUp:
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case IR::Opcode::ShuffleUp:
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case IR::Opcode::ShuffleDown:
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case IR::Opcode::ShuffleDown:
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case IR::Opcode::ShuffleButterfly:
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case IR::Opcode::ShuffleButterfly:
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case IR::Opcode::LaneId:
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info.uses_subgroup_invocation_id = true;
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info.uses_subgroup_invocation_id = true;
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break;
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break;
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case IR::Opcode::GetCbufU8:
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case IR::Opcode::GetCbufU8:
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