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cpu_detect: Utilize Bit<N>
utility function
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@ -1,8 +1,8 @@
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// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project / 2022 Yuzu Emulator
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// Project Licensed under GPLv2 or any later version Refer to the license.txt file included.
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#include <cstring>
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#include "common/bit_util.h"
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#include "common/common_types.h"
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#include "common/x64/cpu_detect.h"
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@ -81,29 +81,22 @@ static CPUCaps Detect() {
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// Detect family and other miscellaneous features
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if (max_std_fn >= 1) {
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__cpuid(cpu_id, 0x00000001);
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if ((cpu_id[3] >> 25) & 1)
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caps.sse = true;
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if ((cpu_id[3] >> 26) & 1)
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caps.sse2 = true;
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if ((cpu_id[2]) & 1)
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caps.sse3 = true;
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if ((cpu_id[2] >> 9) & 1)
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caps.ssse3 = true;
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if ((cpu_id[2] >> 19) & 1)
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caps.sse4_1 = true;
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if ((cpu_id[2] >> 20) & 1)
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caps.sse4_2 = true;
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if ((cpu_id[2] >> 25) & 1)
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caps.aes = true;
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caps.sse = Common::Bit<25>(cpu_id[3]);
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caps.sse2 = Common::Bit<26>(cpu_id[3]);
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caps.sse3 = Common::Bit<0>(cpu_id[2]);
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caps.ssse3 = Common::Bit<9>(cpu_id[2]);
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caps.sse4_1 = Common::Bit<19>(cpu_id[2]);
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caps.sse4_2 = Common::Bit<20>(cpu_id[2]);
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caps.aes = Common::Bit<25>(cpu_id[2]);
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// AVX support requires 3 separate checks:
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// - Is the AVX bit set in CPUID?
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// - Is the XSAVE bit set in CPUID?
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// - XGETBV result has the XCR bit set.
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if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1)) {
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if (Common::Bit<28>(cpu_id[2]) && Common::Bit<27>(cpu_id[2])) {
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if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6) {
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caps.avx = true;
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if ((cpu_id[2] >> 12) & 1)
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if (Common::Bit<12>(cpu_id[2]))
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caps.fma = true;
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}
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}
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@ -111,15 +104,13 @@ static CPUCaps Detect() {
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if (max_std_fn >= 7) {
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__cpuidex(cpu_id, 0x00000007, 0x00000000);
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// Can't enable AVX2 unless the XSAVE/XGETBV checks above passed
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if ((cpu_id[1] >> 5) & 1)
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caps.avx2 = caps.avx;
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if ((cpu_id[1] >> 3) & 1)
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caps.bmi1 = true;
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if ((cpu_id[1] >> 8) & 1)
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caps.bmi2 = true;
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caps.avx2 = caps.avx && Common::Bit<5>(cpu_id[1]);
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caps.bmi1 = Common::Bit<3>(cpu_id[1]);
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caps.bmi2 = Common::Bit<8>(cpu_id[1]);
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// Checks for AVX512F, AVX512CD, AVX512VL, AVX512DQ, AVX512BW (Intel Skylake-X/SP)
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if ((cpu_id[1] >> 16) & 1 && (cpu_id[1] >> 28) & 1 && (cpu_id[1] >> 31) & 1 &&
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(cpu_id[1] >> 17) & 1 && (cpu_id[1] >> 30) & 1) {
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if (Common::Bit<16>(cpu_id[1]) && Common::Bit<28>(cpu_id[1]) &&
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Common::Bit<31>(cpu_id[1]) && Common::Bit<17>(cpu_id[1]) &&
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Common::Bit<30>(cpu_id[1])) {
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caps.avx512 = caps.avx2;
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}
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}
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@ -138,15 +129,12 @@ static CPUCaps Detect() {
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if (max_ex_fn >= 0x80000001) {
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// Check for more features
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__cpuid(cpu_id, 0x80000001);
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if ((cpu_id[2] >> 16) & 1)
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caps.fma4 = true;
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caps.fma4 = Common::Bit<16>(cpu_id[2]);
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}
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if (max_ex_fn >= 0x80000007) {
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__cpuid(cpu_id, 0x80000007);
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if (cpu_id[3] & (1 << 8)) {
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caps.invariant_tsc = true;
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}
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caps.invariant_tsc = Common::Bit<8>(cpu_id[3]);
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}
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if (max_std_fn >= 0x16) {
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