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Merge pull request #6365 from degasus/drop_ChangeProcessorID
core/arm: Drop ChangeProcessorID.
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commit
2c791b38e6
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@ -159,8 +159,6 @@ public:
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*/
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virtual void SetTPIDR_EL0(u64 value) = 0;
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virtual void ChangeProcessorID(std::size_t new_core_id) = 0;
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virtual void SaveContext(ThreadContext32& ctx) = 0;
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virtual void SaveContext(ThreadContext64& ctx) = 0;
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virtual void LoadContext(const ThreadContext32& ctx) = 0;
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@ -255,10 +255,6 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
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cp15->uprw = static_cast<u32>(value);
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}
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void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) {
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jit->ChangeProcessorID(new_core_id);
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}
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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Dynarmic::A32::Context context;
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jit->SaveContext(context);
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@ -48,7 +48,6 @@ public:
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void ChangeProcessorID(std::size_t new_core_id) override;
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bool IsInThumbMode() const {
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return (GetPSTATE() & 0x20) != 0;
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@ -296,10 +296,6 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
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cb->tpidr_el0 = value;
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}
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void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) {
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jit->ChangeProcessorID(new_core_id);
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}
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void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) {
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ctx.cpu_registers = jit->GetRegisters();
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ctx.sp = jit->GetSP();
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@ -45,7 +45,6 @@ public:
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void ChangeProcessorID(std::size_t new_core_id) override;
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void SaveContext(ThreadContext32& ctx) override {}
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void SaveContext(ThreadContext64& ctx) override;
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